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G2985RE1D

DDR Termination Regulator
The G2985 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV –SDRAM systems. It is designed for the system which has low input voltage, low cost, low noise and space consideration.

Downloads

EDS-2985-1054-1.7-200818
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Specifications
VDDQ (V)
min.
1
max.
3.5
Isource
(A)
2.4
Isink
(A)
2.4
IVREF
(mA)
10
VCNTL
(V)
2.5~5.5
EN
S3/S5
Note
DDR1/2/3/3L/4
Package
TDFN3X3-10
Datasheet
EDS-2985-1054-1.7-200818.pdf
Application Fields
Computer Applications

Computer Applications

GMT is committed to developing various circuit switch solutions to achieve protection for systems and devices.

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